ASIC Design Engineer

7606
  • Competitive
  • United States
  • Semiconductor
  • Permanent

ASIC Design Engineer

We are a technology leader delivering purpose-built, high-performance fabrics that accelerate High Performance Computing (HPC), High Performance Data Analytics (HPDA), and Artificial Intelligence (AI) workloads both in the cloud and in data centers.

Our products enable scientific, academic, governmental, and commercial customers to tackle some of the world’s most difficult challenges by effectively focusing the computational power of multiple processing devices at scale. This approach simultaneously improves both result accuracy and time-to-solution for the most complex application workloads. Our solutions are delivered worldwide through an established network of server OEMs and channel partners.

We are hiring talented ASIC Design Engineers with deep expertise in one or more key areas required to build world-class SoCs, which are deployed in high-performance computing, data analytics, and AI interconnect solutions.

Key Responsibilities:

  • End-to-end SoC/ASIC development, including:
    • Front-end standard cell ASIC development, including RTL development, Design Verification, synthesis, and post-silicon validation.
    • Cross-functional collaboration with both internal and external teams at all levels of the organization.
    • Defining, implementing, debugging, and delivering system solutions around purpose-built ASICs.

Minimum Qualifications:

  • 3+ years of post-college experience with silicon development.
  • 3+ years of post-college experience in digital design with one or more HDL languages (System Verilog, Verilog, VHDL).
  • 3+ years of post-college experience in one or more scripting languages (TCL, Python, Perl).
  • Understanding of standard cell ASIC development flow, including digital design, IP integration, simulation, and synthesis.
  • B.S. or M.S. degree in Computer Engineering, Computer Science, or Electrical Engineering.

Preferred Qualifications:

  • Proven track record of first-pass success in ASIC and systems.
  • Experience with multiple clock designs and asynchronous interfaces.

Location:

For this position, we fully support remote employees living within the United States, with the ability to travel periodically to our corporate offices in Chesterbrook, PA for in-person collaboration.

Julian Bahrami Senior Account Manager

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